1. Field of the Invention
The present disclosure relates to liquid crystal display technology, and more particularly to a gate driver on array (GOA) circuit and a liquid crystal device (LCD).
2. Discussion of the Related Art
Conventional gate driver on array (GOA) circuit, if incorporated with All Gate On function, the gate driving signals may not transit to the invalid level immediately after the All Gate On function is completed. As such, redundant gate driving signals may be generated, which may cause the circuit to be invalid.
With respect to All Gate On function, all of the gate driving signals within the GOA circuit is configured to be at a valid level such that all of the horizontal scanning lines may be charged at the same time. In this way, residual charges within each of the pixels may be cleaned and thus the blue issue occurring when the LCD boots up may be resolved.
Signal lines of turn-on pulse signals (STV) are configured to pull down the P point to resolve the Holding issue of Gate signals. The current loaded by the signal line of the turn-on pulse signals (STV) is the sum of the current from all of the branches. When a high PPI panel is driven, the current on the STV signal line may reach a great level, at this moment, the STV signal line may blow out and the GOA driving circuit may be invalid. Thus, the width of the STV wiring has to be increased so as to increase the driving capability of the STV signal line. However, as the route of STV signal line is limited by the GOA layout, a larger electrostatic force may be in company with the increasing of the width of the signal line. The accumulated electrostatic force may cause the blow out of the STV signal line. Thus, the circuit has to be effectively designed to reduce the loading of the STV signal line so as to ensure the normal pull-down of the P point.